src/coreboot: fetch patches from upstream where possible

master
Adam Joseph 2 years ago
parent a9c7c686e5
commit 25f9d4e927

@ -26,10 +26,44 @@ stdenv.mkDerivation {
patchShebangs .
'';
patches =
lib.mapAttrsToList
(k: v: ./patches/. + "/${k}")
(builtins.readDir ./patches);
patches = let inherit (nixpkgsOnBuildForBuild) fetchpatch; in [
(fetchpatch {
# Makefile.inc: Use `define` for cbfs-files-processor-defconfig
url = "https://github.com/coreboot/coreboot/commit/1c08a9a9c4986f2b3c47322f041e289121536dc0.patch";
hash = "sha256-DqrzD8JVW0z+s426p2PCtmO24Of14r4FDN8FynaqS14=";
})
(fetchpatch {
# Makefile.inc: Adapt $(spc) definition
url = "https://github.com/coreboot/coreboot/commit/0f6f70c3942c152c512b1aa51b6f6079a05e003b.patch";
hash = "sha256-x7PK/PLYXqWG6Y8IbmUXAqp2L8/pkPW7btmdyWoR1cI=";
})
(fetchpatch {
# asus/am1i-a: Enable UART according to CONFIG_UART_FOR_CONSOLE
url = "https://github.com/coreboot/coreboot/commit/16a70c3d40db0d31d8b6c6c13603d27ad6bf5be3.patch";
hash = "sha256-tG465Y56TMYQdiyeGPg9I5BfakAkxi0pyBWvmJRgMKM=";
})
(fetchpatch {
# drivers/spi/gigadevice.c: Add the rest of >=1MB Gigadevice GD25 chips
url = "https://github.com/coreboot/coreboot/commit/2db6e6806b0966d5e921752aa3f91af0310b3181.patch";
hash = "sha256-Bvtz4joH+v5RSzDPAa8w0in/UKXdPvGO2tijamHPAfs=";
})
./patches/0006-remove-submodules.patch
./patches/0008-payloads-external-linux-allow-CONFIG_LINUX_COMMAND_L.patch
./patches/0009-payloads-Kconfig-add-CONFIG_UNCOMPRESSED_PAYLOAD.patch
./patches/0010-rk3399-mainboard-google-gru-add-define-for-GPIO_PEN_.patch
./patches/0011-rk3399-src-Kconfig-increase-HEAP_SIZE-to-0x40000-byt.patch
./patches/0012-rk3399-include-soc-memlayout.ld-enlarge-RAMSTAGE-and.patch
./patches/0013-kgpe-d16-src-arch-x86-use-CONFIG_CBFS_PREFIX-instead.patch
./patches/0014-kgpe-d16-ignore-nvram-for-power_state-always_on-iomm.patch
./patches/0015-kgpe-d16-factor-out-is_recovery_jumper_set-print-val.patch
./patches/0016-kgpe-d16-src-drivers-pc80-factor-rewrite_cmos-out-of.patch
./patches/0017-use_fallback-platform-independent-part.patch
./patches/0018-use_fallback-rk3399-gru-kevin-use-fallback-if-watchd.patch
./patches/0019-use_fallback-rk3399-gru-kevin-update-for-coreboot-4..patch
./patches/0020-use_fallback-kgpe-d16-implement-using-nvram-with-cmo.patch
./patches/0021-am1i-omit-amdfw.rom-completely-it-has-broken-address.patch
./patches/0022-kgpe-d16-disable-sanitize_cmos-it-causes-too-many-pr.patch
];
nativeBuildInputs = [
git

@ -1,47 +0,0 @@
From 9d85a5a984086d38632bd749c8ba18e320433b49 Mon Sep 17 00:00:00 2001
From: Nico Huber <nico.h@gmx.de>
Subject: [PATCH 01/22] [CHERRY-PICK] Makefile.inc: Use `define` for
cbfs-files-processor-defconfig
The body contains a `#` and GNU make 4.3 disagrees with earlier versions
if it should be treated as a comment. Turn it into a `define` which has
clearer semantics regarding comments (interpretation is supposed to be
deferred until the variable is expanded).
Change-Id: I589542abbd14082c3ecc4a2456ebd809fb6911ea
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38793
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
Makefile.inc | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Makefile.inc b/Makefile.inc
index b25ac6b426..7e1f3a5456 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -286,15 +286,16 @@ cbfs-files-processor-vsa= \
# Reduce a .config file to its minimal representation
# arg1: input
# arg2: output
-cbfs-files-processor-defconfig= \
+define cbfs-files-processor-defconfig
$(eval $(2): $(1) $(obj)/build.h $(objutil)/kconfig/conf; \
+printf " CREATE $(2) (from $(1))\n"; \
- printf "\# This image was built using coreboot " > $(2).tmp && \
+ printf "# This image was built using coreboot " > $(2).tmp && \
grep "\<COREBOOT_VERSION\>" $(obj)/build.h |cut -d\" -f2 >> $(2).tmp && \
$(MAKE) DOTCONFIG=$(1) DEFCONFIG=$(2).tmp2 savedefconfig && \
cat $(2).tmp2 >> $(2).tmp && \
rm -f $(2).tmp2 && \
\mv -f $(2).tmp $(2))
+endef
#######################################################################
# Compile a C file with a bare struct definition into binary
--
2.36.1

@ -1,36 +0,0 @@
From f56f40a6ee1ab4cbd5ed59b8f1fc1629b93dabe4 Mon Sep 17 00:00:00 2001
From: Nico Huber <nico.h@gmx.de>
Subject: [PATCH 02/22] [CHERRY-PICK] Makefile.inc: Adapt $(spc) definition
GNU Make 4.3 is more picky about the $(spc) definition. It seems, the
variable ends up empty. The old definition worked for nearly 8 years,
RIP.
Tested with GNU Make 4.2.1 and 4.3.
Change-Id: I7981e0066b550251ae4a98d7b50e83049fc5586a
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38790
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
Makefile.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile.inc b/Makefile.inc
index 7e1f3a5456..44c58be5b7 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -154,7 +154,7 @@ ws_to_under=$(shell echo '$1' | tr ' \t' '_')
#######################################################################
# Helper functions for ramstage postprocess
spc :=
-spc +=
+spc := $(spc) $(spc)
comma := ,
# Returns all files and dirs below `dir` (recursively).
--
2.36.1

@ -1,49 +0,0 @@
From f33d2794b3ff7893c022fe1e1bd2c444afde94de Mon Sep 17 00:00:00 2001
From: Mike Banon <mikebdp2@gmail.com>
Subject: [PATCH 03/22] [CHERRY-PICK] asus/am1i-a: Enable UART according to
CONFIG_UART_FOR_CONSOLE
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It has been observed by me and Elisenda Cuadros / Gergely Kiss [1] that
the boot process of this board is super slow when UART 0 is being used -
even if nothing is connected to it. Enable UART according to
CONFIG_UART_FOR_CONSOLE - and, if UART 0 is selected, it will be initialized
at romstage and this problem will not happen.
[1] https://mail.coreboot.org/pipermail/coreboot/2018-February/086132.html
Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Change-Id: I6579aa8fd092da84f8afdcc33496db45c582919f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33796
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
---
src/mainboard/asus/am1i-a/romstage.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/src/mainboard/asus/am1i-a/romstage.c b/src/mainboard/asus/am1i-a/romstage.c
index 791e80b279..5574ee9259 100644
--- a/src/mainboard/asus/am1i-a/romstage.c
+++ b/src/mainboard/asus/am1i-a/romstage.c
@@ -25,7 +25,15 @@
#include <superio/ite/it8623e/it8623e.h>
#define ITE_CONFIG_REG_CC 0x02
+
+#if CONFIG_UART_FOR_CONSOLE == 0
+#define SERIAL_DEV PNP_DEV(0x2e, IT8623E_SP1)
+#elif CONFIG_UART_FOR_CONSOLE == 1
#define SERIAL_DEV PNP_DEV(0x2e, IT8623E_SP2)
+#else
+#error "Invalid value for CONFIG_UART_FOR_CONSOLE"
+#endif
+
#define GPIO_DEV PNP_DEV(0x2e, IT8623E_GPIO)
#define CLKIN_DEV PNP_DEV(0x2e, IT8623E_GPIO)
#define ENVC_DEV PNP_DEV(0x2e, IT8623E_EC)
--
2.36.1

@ -1,30 +0,0 @@
From bfbb94258e7360fc338de4cad461e01f1efe57a6 Mon Sep 17 00:00:00 2001
Subject: [PATCH 07/22] drivers/spi/gigadevice.c: add definition for gigadevice
16mbyte chip
---
src/drivers/spi/gigadevice.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/src/drivers/spi/gigadevice.c b/src/drivers/spi/gigadevice.c
index 2d7544c485..6aec82a86c 100644
--- a/src/drivers/spi/gigadevice.c
+++ b/src/drivers/spi/gigadevice.c
@@ -106,6 +106,14 @@ static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = {
.nr_blocks = 256,
.name = "GD25Q128(B)",
},
+ {
+ .id = 0x6018,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16, /* datasheet says "64/32K block", not sure which it means */
+ .nr_blocks = 256,
+ .name = "GD25LQ128(D)",
+ },
};
static int gigadevice_write(const struct spi_flash *flash, u32 offset,
--
2.36.1
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